CV

Doctor of Philosophy and Master of Science

University of Florida, Gainesville, FL, USA

• Thesis - Hardware Security Assurance via Obfuscation and Authentication
• Expertise - Hardware Supply Chain Security, CAD for Security, IP Protection, Obfuscation, Security Metric, Machine Learning, IP Authentication.

Bachelor of Science

bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh

• Thesis - Ion Energy Distribution of Multi-frequency Capacitively Plasma.

Assistant Professor

Department of Electrical and Computer Engineering, University of Central Florida

• Tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at University of Central Florida
• Affiliated with both ECE and CS department at UCF under the "Cyber Security and Privacy Cluster"

Security Architecture Engineer

Intel Product Assurance and Security team, Intel Corporation

• Perform threat modeling of critical security vulnerabilities
• Security hardening of next generation Xeon processors against microarchitetcural, side-channel, and telemetry atatcks

Graduate Research Assistant

Florida Institute for Cybersecurity Research, Gainesville, FL, USA

• Worked in IP protection and authentication team to develop quantifiable and AI assured countermeasures against semiconductor supply chain threats

Security Researcher Intern

Intel Product Assurance and Security team, Intel Corporation

• Developed automated threat models review tool utilizing CWE, CVE, and CAPEC lists from mitre.org for nine different adversary models

Hardware Security Intern

Intel Corporation, Hillsboro, Oregon

• Developed firmware for FIPS 140 -3 security certification of cryptographic hardware using NIST Cryptographic Algo. Verification Program (CAVP)

Senior Design Engineer

Neural Semiconductor Ltd.

• Developed full-chip design flow for Cadence tools; managed PDK & served as foundry contact window.
• Lead a Physical design team of 20 engineers to train and deliver 22nm custom chips.

ASIC Physical Design Engineer

PrimeSilicon Technologies Ltd.

• Worked as implementation and verification engineer to tape out 14nm and 28nm custom silicon using commercial EDA tools
• Developed EDA tool flow in Aprissa, Synopsys, Mentor Graphics, and Cadence tools

• IEEE/ACM DAC PhD Forum Best doctoral dissertation competition finalist
• IEEE VTS TTTC’s E. J. McCluskey Best Doctoral Thesis Competition – Runner up

• IEEE/ACM Design Automation and Test in Europe (DATE) Best Paper Award Nomination
• IEEE/ACM DATE PhD Forum Best doctoral dissertation competition finalist