Secure eFPGA based Hardware Redaction and Acceleration

Embedded Field-Programmable Gate Arrays (eFPGAs) are highly valuable in the realms of IP redaction and acceleration due to their inherent flexibility and reconfigurability. In IP redaction, eFPGAs play a crucial role in securely removing or modifying sensitive intellectual property (IP) within a design before it is shared or deployed, ensuring confidentiality. The flexibility of eFPGAs allows for dynamic IP redaction processes, adapting to different IP protection requirements. eFPGAs are essential for acceleration, particularly in the context of AI, HPC, space, automotive, FHE and data processing applications. These programmable hardware components can be tailored to accelerate specific functions or algorithms, providing optimized acceleration for various workloads. However, eFPGAs suffer from several reverse engineering [9] and approximation based attacks. I plan to develop security monitoring and architectural countermeasures for eFPGA vulnerabilities to ace the pathway for eFPGA based hardware redaction and acceleration.