Chiplet Authentication

We all are aware that Moore’s law is saturating these days and heterogeneous systems where multiple chiplet SoCs are integrated, is getting the focus now. These chiplets are prone to piracy and side-channel attacks. Heterogeneous integration involves combining diverse chiplets, each potentially sourced from different manufacturers, onto a single package. Authentication mechanisms are essential to verify the authenticity and trustworthiness of these chiplets throughout their lifecycle, from manufacturing to deployment. On the other hand, due to the presence of active interposer and the combination of different components, may cause varied power consumption or EM characteristics leading multifold side-channel and tampering attack. I plan to develop multi-party computation based chiplet authentication, and countermeasures against side-channel and tampering attack for a secure heterogeneous ecosystem.