Publications
by categories in reversed chronological order.
2023
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LLE: Mitigating IC Piracy and Reverse Engineering by Last Level EditIn 2023 ASM ISTFA, 2023
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Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic LockingIn Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
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iPROBE: Internal Shielding Approach for Protecting Against Front-side and Back-side Probing AttacksIn IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
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CAD for hardware securityIn Springer Nature 2023., 2023
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CAPEC: A Cellular Automata Guided FSM-based IP Authentication SchemeIn 2023 IEEE 41st VLSI Test Symposium (VTS), pp 1-8., 2023
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EvoLUTe: Evaluation of Look-Up-Table-based Fine-Grained IP RedactionIn 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp 1-6., 2023
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ReTrustFSM: Toward RTL Hardware Obfuscation-A Hybrid FSM ApproachIn 2023 IEEE Access, vol 11, pp 19741-19761., 2023
2022
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RTL-FSMx: Fast and Accurate Finite State Machine Extraction at the RTL for Security ApplicationsIn 2022 IEEE International Test Conference (ITC), pp 167-174., 2022
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O’clock: lock the clock via clock-gating for SoC IP protectionIn Proceedings of the 59th ACM/IEEE Design Automation Conference, pp 775-780., 2022
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Rethinking watermark: Providing proof of ip ownership in modern socs2022
2021
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LL-ATPG: logic-locking aware test using valet keys in an untrusted environmentIn 2021 IEEE International Test Conference (ITC), 2021
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Security assessment of dynamically obfuscated scan chain against oracle-guided attacksIn ACM Transactions on Design Automation of Electronic Systems (TODAES), vol 26, number 4, pp 1-27., 2021
2020
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The key is left under the mat: On the inappropriate security assumption of logic locking schemesIn 2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp 262-272., 2020
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Defense-in-depth: A recipe for logic locking to prevailIn 2020 Integration, vol 72, pp 39-57, Elsevier., 2020